1. Field of the Invention
The invention relates generally to semiconductor device manufacture. More particularly, the invention is directed to an apparatus and method for thermally processing a substrate by scanning the substrate with a line of radiation.
2. Description of Related Art
The integrated circuit (IC) market is continually demanding greater memory capacity, faster switching speeds, and smaller feature sizes. One of the major steps the industry has taken to address these demands is to change batch processing multiple substrates, such as silicon wafers, in large furnaces to single substrate processing in small reaction chambers.
Generally, there are four basic operations performed in such batch processing fabrication, namely layering, patterning, doping, and heat treatments. Many of these operations require heating the substrate to high temperatures so that various chemical and physical reactions can take place. Of particular interest, are heat treatments and layering, each of which will be discussed below.
Heat treatments are operations in which the substrate is simply heated and cooled to achieve specific results. During heat treatment no additional material is added to or removed from the substrate. Heat treatments, such as rapid thermal processing or annealing, typically require providing a relatively large amount of thermal energy (high temperature) to the substrate in a short amount of time, and thereafter rapidly cooling the substrate to terminate the thermal process. The amount of thermal energy transferred to the substrate during such processing is known as the thermal budget. The thermal budget of a material is a function of temperature and the duration of the process. A low thermal budget is desired in ultra-small IC manufacturing, which can only be provided at high temperature if the time of the process is very short.
Examples of heat treatments currently in use include Rapid Thermal Processing (RTP) and impulse (spike) annealing. While such processes are widely used, current technologies are not ideal. Such technologies tend to ramp-up and ramp-down the temperature of the substrate too slowly, in addition to exposing the substrate to elevated temperatures for long periods. These problems become more sever with increasing substrate sizes, increasing switching speeds, and/or decreasing feature sizes.
In general, these heat treatments raise the substrate temperature under controlled conditions according to a predetermined thermal recipe. These thermal recipes fundamentally consist of: a temperature that the substrate must be heated to; the rate of change of temperature, i.e., the temperature ramp-up and ramp-down rates; and the time that the thermal processing system remains at a particular temperature. For example, thermal recipes may require the substrate to be heated from room temperature to distinct temperatures of 1200° C. or more, for processing times at each distinct temperature ranging up to 60 seconds, or more.
Moreover, to meet certain objectives, such as minimal diffusion of dopants in the substrate the amount of time that each substrate is subjected to high temperatures must be restricted. To accomplish this, the temperature ramp rates, both up and down, are preferably high. In other words, it is desirable to be able to adjust the temperature of the substrate from a low to a high temperature, and vise versa, in as short a time as possible so as to minimize the thermal budget.
This requirement for high temperature ramp rates led to the development of Rapid Thermal Processing (RTP), where typical temperature ramp-up range from 200-400° C./s, as compared to 5-15° C/minute for conventional furnaces. Typical ramp-down rates are in the range of 80-150° C./s.
FIG. 1 is a graph 100 of thermal profiles of different prior art thermal processes. As can be seen, the thermal profile 102 of a typical RTP system has a 250° C./s ramp-up rate and a 90° C./s ramp-down rate.
A drawback of RTP is that it heats the entire substrate even though the IC devices reside only in the top few microns of the substrate. This limits how fast one can heat up and cool down the substrate. Moreover, once the entire substrate is at an elevated temperature, heat can only dissipate into the surrounding space or structures. As a result, today's state, of the art RTP systems struggle to achieve 400° C./s ramp-up rates and 150° C./s ramp-down rates.
FIG. 1 also shows a thermal profile 104 of a laser annealing process. Laser annealing is used during the fabrication of Thin Film Transistor (TFT) panels. Such systems use a laser spot to melt and recrystalize polysilicon. The entire TFT panel is exposed by scanning the laser spot across successive exposure fields on the panel. For substrate applications a laser pulse is used to illuminate an exposure field for a duration of approximately 20-40 ns, where the exposure field is obtained by rastering across and down the substrate. As can be seen from the thermal profile 104 for laser annealing, the ramp rate is nearly instantaneous at billions of degrees per second. However, the laser pulse or flash used for laser annealing is too fast and, often does not provide enough time for sufficient annealing to occur for non-melt processes. Also, devices or structures next to the exposed regions may either be exposed to extreme temperature causing them to melt, or to temperatures that are too low resulting in too little annealing. Still further, homogenization of the thermal exposure of each portion of the substrate is difficult to attain because different regions adsorb at different rates resulting in huge temperature gradients. The process is too fast for thermal diffusion to equilibrate temperature, thereby creating sever pattern dependencies. As a result, this technology is not appropriate for single crystal silicon annealing because different regions on the substrate surface may be heated to vastly different temperatures causing large non-uniformities over short distances.
Another thermal processing system currently in development by Vortek Industries Ltd., of Canada, uses flash assisted spike annealing to attempt to provide a high thermal energy to the substrate in a short amount of time and then rapidly cool the region to limit the thermal exposure. Use of this thermal processing system should give the junction depth of a spike anneal to 1060° C. but improve the activation with flash to 1100° C. Typically, the RTP system ramps up to the desired temperature typically around 1060° C. then begins to ramp down immediately after having reached the desired flash temperature. This is done to minimize the amount of diffusion that takes place while still getting suitable activation from the elevated temperature. The thermal profile 106 of such a flash assisted spike anneal is also shown in FIG. 1.
In view of the above, there is a need for an apparatus and method for annealing a substrate with high ramp-up and ramp-down rates. This will offer greater control over the fabrication of smaller devices leading to increased performance. Furthermore, such an apparatus and method should ensure that every point of the substrate has a substantially homogenous thermal exposure, thereby reducing pattern dependencies and potential defects.
We now turn our attention to layering, which is another basic fabrication operation that typically requires the addition of energy or heat. Layering adds thin layers or films to a substrate's surface using a variety of techniques, of which the most widely used are growing and deposition. The added layers function in the IC devices as semiconductors, dielectrics (insulators), or conductors. These layers must meet various requirements, such as uniform thickness, smooth and flat surfaces, uniform composition and grain size, stress-free films, purity, and integrity. Common deposition techniques that require the addition of energy are: Chemical Vapor Deposition (CVD); a variation of CVD known as Rapid Thermal Chemical Vapor Deposition (RTCVD); another variation of CVD known as Low Pressure CVD (LPCVD); and Atomic Layer Deposition (ALD), to name but a few.
CFD is the most widely used technique for physically depositing one or more layers or films, such as silicon nitride (Si3N4), on a substrate surface. During the CVD process, various gases, such as ammonia (NH3) and dichlorosilane (DCS), containing the atoms or molecules required in the final film are injected into a reaction chamber. Chemical reactions between the gases are induced with high energy such as heat, light, or plasma. The reacted atoms or molecules deposit on the substrate surface and build up to form a thin film having a predetermined thickness. Byproducts of the reactions are subsequently flushed from the reaction chamber. The deposition rate can be manipulated by controlling the reaction condition of supplied energy; the amount and ratio of gases present in the reaction chamber; and/or the pressure within the reaction chamber.
The reaction energy is typically supplied by heat (either conduction or convection), induction RF, radiant, plasma, or ultraviolet energy sources. Temperatures typically range from room temperature to 1250° C., and more typically from 250° C. to 850° C.
Although, it is desirable in current thermally driven processes to heat the substrate to a high temperature, it is also desirable that the substrate is not exposed to these high temperatures for too long. In other words, it is desirable to be able to adjust the temperature of the substrate from a low to a high temperature, and vice versa, in as short a time as possible, i.e., have a low thermal budget.
However, current thermally driven processes heat the entire substrate, despite the fact that only the surface of the substrate needs to be heated. Heating the entire substrate limits how fast one can heat up and cool down the substrate, as the substrate has a thermal inertia that resists changes in temperature. For example, once the entire substrate is at an elevated temperature, cooling the substrate can only occur by heat dissipating into the surrounding space or structures.
In CVD and LPCVD, the various gases are supplied or injected into the reaction chamber at the same time. A gas phase reaction occurring between the reactant gases may, however, occur at any location within the reaction chamber, including the ambient space around the substrate. Reactions occurring in the ambient space are undesirable as they can form particles which can become imbedded in the film. Gas phase reactions also make the deposition dependant on flow, significant non-uniformities can arise due to flow dependance.
More recently, ALD was developed to address the above described gas phase reaction problems with CVD and LPCVD. In ALD, a first gas is injected into the reaction chamber. The atoms of the first gas adhere to the surface of the substrate. A purging gas is then injected to flush the first gas from the reaction chamber. Finally, a second gas is injected into the reaction chamber to react with the first gas on the surface of the substrate. As the first and second gases are not present in the reaction chamber at the same time, gas phase reaction does not occur in the ambient space. This eliminates the problems associated with particle formation in the ambient space and flow dependance. However, deposition rates for ALD are slow, taking approximately 1 Angstrom per second. Also, ALD is bound by the same temperature constraints and thermal budget issues as CVD.
In light of the above, there is a need for an apparatus and method for depositing layers on a substrate that reduces gas phase reaction problems. More specifically, such an apparatus and method, should only heat the surface of the substrate and provide high ramp-up and ramp-down rates, i.e., low thermal budget. Such an apparatus and method preferably meets general and specific parameters, such as uniform layer thickness, smooth and flat layer surfaces, uniform layers composition and grain size, low stress films, purity, and integrity.